Constraint: Implication and Equivalence

Source – SV Verification Directory

Implication Operator

The implication operator -> is another form of conditional (if) constraint. Where the antecedent (condition A) is on left hand side of the -> and consequent (condition B) is on the right hand side of the -> operator.

Syntax

constraint <constrain name> {A -> B;}

The expression A -> B is equivalent to the expression (!A || B).

• If A is true, then B must also hold true.

• If A is false, then B is not constraint according to the implication.

  The truth table below shows the logical value of A and B.

Note: The implication operator is partly bidirectional constraint, meaning A->B does not imply that B->A.

Equivalence Operator

The equivalence operator <-> is bidirectional where A <-> B is defined as ((A -> B) && (B->A)). This operator is same as logical XNOR. The truth table below shows the logical values of A and B.

Syntax

constraint <constraint_name> {A <-> B;}

Example Code

class const_ex;

   rand bit       a;
   rand bit [3:0] b;
   rand bit [3:0] c;
   rand bit	  d;
   rand bit [3:0] e;
   rand bit [3:0] f;

   // -> similar to if-else
   constraint cond_1 {b > 1; b < 9; (a == 1)  -> (c == b);}
   // equivalence operator is similar to xnor (not supported in Vivado)
   constraint cond_2 {f > 1; f < 9; (d == 1) <-> (e == f);}

   function void disp();
      $display("a = %d, b = %d, c = %d :::: d = %d, e = %d, f = %d", a, b, c, d, e ,f);
   endfunction // disp

endclass // const_ex

module tb_const_imply;

   const_ex imp;

   initial begin
      imp = new();
      for(int i = 0; i < 10; i ++) begin
         imp.randomize();
         imp.disp();
      end
   end

endmodule

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