Decoder: An Overview
The functionality of a decoder is the opposite of an Encoder. A decoder is a combinational circuit that converts a binary coder to a set of output signals with only one bit of the being high at any given time. It consists of N input lines and 2^N output lines.
Design: 2-to-4 Decoder
A 2-to-4 decoder consists of two input lines and four output lines. The truth table of the decoder is shown below:
| in[1] | in[0] | out[3] | out[2] | out[1] | out[0] |
|---|---|---|---|---|---|
| 0 | 0 | 0 | 0 | 0 | 1 |
| 0 | 1 | 0 | 0 | 1 | 0 |
| 1 | 0 | 0 | 1 | 0 | 0 |
| 1 | 1 | 1 | 0 | 0 | 0 |
Boolean equation for the decoder from the truth table is as follows:
out = in[1]’ * in[0]’ + in[1]’ * in[0] + in[1] * in[0]’ + in[1] * in[0]
Design: 3-to-8 Decoder
A 3-to-8 decoder consists of three input lines and eight output lines. The truth table for the decoder is as follows:
| in[2] | in[1] | in[0] | out[7] | out[6] | out[5] | out[4] | out[3] | out[2] | out[1] | out[0] |
|---|---|---|---|---|---|---|---|---|---|---|
| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
| 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 |
| 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
| 0 | 1 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 |
| 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 |
| 1 | 0 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 |
| 1 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 |
| 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
From the truth table, the boolean equation can be written as:
out = in[2]’ * in[1]’ * in[0]’ + in[2]’ * in[1]’ * in[0] + in[2]’ * in[1] * in[0]’ + in[2]’ * in[1] * in[0] + in[2] * in[1]’ * in[0]’ + in[2] * in[1]’ * in[0] + in[2] * in[1] * in[0]’ + in[2] * in[1] * in[0]
Verilog Code: Parameterized Decoder
always_comb
out = 1 << in;