SourceRTL Design Directory

De-Multiplexer (DEMUX): An Overview

A DEMUX or data distributor is a one-to-many combinational circuit that receives inputs from a single input line and transmits the same information over one of ’n’ possible output lines. DEMUX transmits the same data that is received on the input to different destinations. A de-multiplexer is a 1-to-N device, where N/n is the number of outputs and with ’m’ select line, therefore, 2^m = n.

Need For De-Multiplexers

The primary need to de-multiplexers arises in scenarios where a single data stream requires to be directed to multiple destinations.

  1. Data distribution.
  2. Memory address decoding.
  3. Communication system.
  4. Control logic.

Applications

De-multiplexers are used in several fields where there is a necessity of connecting a single source to several outputs. Some of the applications are listed below:

  1. De-multiplexers are used for data routing.
  2. Used in synchronous systems for data transmissions.
  3. Selecting different banks for memory decoding.

Design: 1-to-2 DEMUX

The truth table of 1-to-2 de-multiplexer is shown below, in which the inputs din is routed to z0 or z1 depending on the value of the select line sell.

seldinz1z0
0000
0101
1000
1110

Boolean Equation: z0 = sel’ * din and z1 = sel * din.

Verilog Code: 1-to-2 DEMUX

module demux1_to_2(din,sel,z);
   input din, sel;
   output [1:0] z;

   assign z0 = ~sel and din;
   assign z1 =  sel and din;

endmodule

Design: 1-to-4 DEMUX

A de-multiplexer with two select lines and four output lines is called 1-to-4 DEMUX. Suppose the input is din, the select lines are sel[1], sel[0], and the output is z[3], z[2], z[1], and z[0]. The truth table for 1-to-4 demux is:

sel[1]sel[0]z[3]z[2]z[1]z[0]
00000din
0100din0
100din00
11din000

Verilog Code: 1-to-4 DEMUX

always_comb begin
   z = 4'h0;
   case(sel)
     2'h0 : z[0] = din;
     2'h1 : z[1] = din;
     2'h2 : z[2] = din;
     2'h3 : z[3] = din;
   endcase
end

1-to-4 demux design can be found here and the testbench can be found here.

De-Multiplexer Tree

De-multiplexers with larger outputs can be built using smaller de-multiplexers. A 1-to-8 de-multiplexer can be built using two 1-to-4 de-multiplexer.

Design: 1-to-8 DEMUX

Truth table for 1-to-8 demux is shown below. For a 8 ouput line demux, 3 select lines are required.

sel[1]sel[1]sel[0]z[7]z[6]z[5]z[4]z[3]z[2]z[1]z[0]
0000000000din
001000000din0
01000000din00
0110000din000
100000din0000
10100din00000
1100din000000
111din0000000

Verilog Code: 1-to-8 DEMUX

A 1-to-8 demux can be built using two 1-to-4 demux. The design for 1-to-8 demux using two 1-to-4 demux in Verilog is shown below:

demux1_to_4 DEM1 (/*AUTOINST*/
                  // Outputs
                  .z			(tempz1[3:0]),
                  // Inputs
                  .din			(din),
                  .sel			(sel[1:0]));
demux1_to_4 DEM2 (/*AUTOINST*/
                  // Outputs
                  .z			(tempz2[3:0]),
                  // Inputs
                  .din			(din),
                  .sel			(sel[1:0]));

   assign z = sel[2] ? {tempz2,4'h0} : {4'h0,tempz1};

Advantages/Disadvantages of DEMUX

Advantages

  1. De-Multiplexer distributes a single data stream to multiple destinations providing flexible and efficient means of data flow.
  2. In memory systems, de-multiplexers are utilized for address decoding.
  3. In digital communication systems, de-multiplexers are essential for extracting data streams from combined scenarios like TDM and FDM.
  4. De-multiplexers enable efficient use of resources by allowing a single data stream to be directed to different destinations, reducing the need for redundant paths.

Disadvantages

  1. De-multiplexers introduce propagation delays. Based on the design complexity, verification and debugging processes are challenging.
  2. As the number of output channels increases, the complexity of the control logic increases.
  3. Serialization is a limitation, when there is simultaneous data transfer to multiple channels is critical.