Multiplexer

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Multiplexer (MUX): An Overview

A multiplexer is a digital circuit that selects one input out of many inputs, hence, it is also called a data selector. It consists of 2^n inputs with n selector lines, which are used to select which input to send to the output.

Need For Multiplexers

The need for MUXs arises wherever there is a need to transmit multiple data over a shared communication channel.

1. Resource Optimization: Communication medium is shared between multiple sources with the aid of a MUX thereby reducing the need for a dedicated channel for each source. Data routing is reduced as it uses the same communication channel. The number of pins required for input and output is also reduced contributing to compact and cost-effective designs.

1. Bandwidth Efficiency: Multiple signals can be transmitted over a single channel by using a MUX to maximize the available bandwidth.
2. Time Division Multiplexing (TDM): Data from different sources are allocated to the communication channel at different times with the help of multiplexers.

Applications

Multiplexers are used widely in a diverse range of fields, some of the use cases are given below:

1. Telecommunication: Combining multiple voice or data channels onto a single transmission line (CDMA, FDM, WDM, etc.).
2. Digital Electronics: In digital systems and microprocessors, multiplexers are employed to select between different input sources or to route data within the system (parallel to serial converter, 7 Segment display).
3. Data Acquisition: Multiplexers are used extensively for data collection from different sensors or measurement devices such as ADC/DAC.
4. Networking: In a networking system where multiple data streams are combined to transmit over the network.
5. Memory Addressing: Multiplexers are used in address decoding and encoding.

Design: 2-to-1 MUX

A 2-to-1 multiplexer consists of two inputs ‘d0’ and ‘d1’ and a single select line ‘s0’ and an output ‘z’.

Truth Table: 2-to-1 MUX

Boolean Equation: z = s0 * d1 + s0’ * d0

Verilog Code: 2-to-1 MUX

module mux2_to_1(d0,d1,s0,z)
  input d0,d1,s0;
  output z;

  assign z = s0 ? d0 : d1;

endmodule

Design: 4-to-1 MUX

A multiplexer which composed of two select lines and one output is called a 2-to-1 multiplexer. Since, the number if inputs are four the select signals are sel = 2^4 => 2.

Suppose the four inputs are din[0], din[1], din[2], din[3] and select lines are sel[0], sel[1] and the output is z, the truth table for a 2-to-1 mux:

Boolean equation can be in POS written as:

z = sel[1]’ * sel[0]’ * din[0] + sel[1]’ * sel[0] * din[1] + sel[1] * sel[0]’ * din[2] + sel[1] * sel[0] * din[3]

Verilog Code: 4-to-1 MUX

always_comb begin
   case(sel)
     2'h0: z = din[0];
     2'h1: z = din[1];
     2'h2: z = din[2];
     2'h3: z = din[3];
     default: z = din[0];
   endcase
end

The design for 4-to-1 mux can be found here and the its testbench can be found here.

Multiplexer Tree

Multiplexers with a large number of inputs can be built by cascading smaller multiplexers. For example, an 8-to-1 multiplexer can be built using two 4-to-1 multiplexer. Similarly, a 4-to-1 multiplexer can be built using two 2-to-1 multiplexer. In other words, any N-to-1 multiplexer can be built using smaller n-to-1 multiplexers.

Design: 8-to-1 MUX

An 8-to-1 MUX can be designed conventionally by using the truth table. As the number of inputs increases the design becomes tedious when using the conventional method. Therefore, smaller MUX designs are built first and they are reused multiple times to build bigger mux.

Truth Table: 8-to-1 MUX

Here, an 8-to-1 mux is built using two 4-to-1 mux. It consists of eight inputs, three select lines, and a single output line.

Verilog Code: 8-to-1 MUX using two 4-to-1 MUX

mux4_to_1 m1 (// outputs
                  .z      (temp1),
                  // inputs
                  .din    (din[3:0]),
                  .sel    (sel[1:0]));


mux4_to_1 m2 (// outputs
                  .z      (temp2),
                  // inputs
                  .din    (din[7:4]),
                  .sel    (sel[1:0]));

z = sel[2] ? temp2 : temp1;

Advantages/Disadvantages of Multiplexer

Advantages

1. Reduces the number of wires used thereby reducing the overall design cost and complexity.
2. Simplifies logic design.
3. Does not require k-maps to build the design.

Disadvantages

1. Increases complexity in many-to-1 designs.
2. The serialization nature of multiplexers is a limitation in simultaneous data transfer.
3. The process of selecting and transmitting data serially adds to propagation delay in time-sensitive applications.
4. Implementation of a high number of inputs on FPGA may require a signification portion of available resources, limiting the overall design flexibility.
5. In a shared channel, there is a risk of crosstalk or interference between multiplexed signals.
6. In high-frequency applications, the use of multiplexers can impact signal integrity due to issues like signal attenuation and distortion.