Half Adder
Half adder is a combinational arithmetic circuit. Its functionality is to add two 1-bit binary digits to produce a sum bit and carry as the output.
Half adder truth table:
| A | B | Sum (S) | Carry (Co) |
|---|---|---|---|
| 0 | 0 | 0 | 0 |
| 0 | 1 | 1 | 0 |
| 1 | 0 | 1 | 0 |
| 1 | 1 | 0 | 1 |
Boolean equation for sum and carry can be written as :
- Sum = A xor B
- Carry = A and B
Half adder can be modelled in verilog using data flow representation:
assign s = a ^ b;
assign co = a & b;