The B-type (branch) instruction is similar to the S-type (store) instruction. It differs slightly with the use of immediate values. Figure 1 illustrate the fields of the branch type instruction.
Figure 1: Instruction Format
- Opcode: The opcode or operation code is a 7-bit field that defines the type of operation to be performed.
- Function Field: This 3-bit
funct3field, known as the control bits, determines the specific operation to be executed such as store byte (sb), store half (sh) and store word (sw). - Registers: The register
rs1is the base address of source register andrs2is the value to be stored to memory. - Immeditate Field: The two immediate fields together make up 13-bit signed offset number for the base address in
rs1.
Immeditate instruction is describe much more clearly w.r.t to the branch instruction instr below:
- imm[12] = instr[31]
- imm[11] = instr[7]
- imm[10:5] = instr[30:25]
- imm[4:1] = instr[11:8]
- imm[0] = 0
This bit arrangement is opted to ensure that immediate bits occupy the same instruction bits across different instruction formats as much as possible and that the sign bit is always in instr[31].
Note: The imm[0] is always zero ,hence, not include in the immediate encoded fields hence out 13-bit signed only 12 bits are encoded in the imm instruction..
Below is table that describes the list of B-type instructions.
| funct3 | opcode | Description | Instruction |
|---|---|---|---|
| 000 | 1100011 (99) | branch if = | beq rs1, rs2, label |
| 001 | 1100011 (99) | branch if != | bne rs1, rs2, label |
| 100 | 1100011 (99) | branch if < | blt rs1, rs2, label |
| 101 | 1100011 (99) | branch if >= | bge rs1, rs2, label |
| 110 | 1100011 (99) | branch if < unsigned | bltu rs1, rs2, label |
| 111 | 1100011 (99) | branch if >=unsigned | bgeu rs1, rs2, label |